RISC-V IOMMU HPM support [LWN.net]
| From: | Zong Li |
|
| To: | tomasz.jeznach-AT-linux.dev, joro-AT-8bytes.org, will-AT-kernel.org, robin.murphy-AT-arm.com, pjw-AT-kernel.org, palmer-AT-dabbelt.com, aou-AT-eecs.berkeley.edu, alex-AT-ghiti.fr, mark.rutland-AT-arm.com, andrew.jones-AT-oss.qualcomm.com, guoren-AT-kernel.org, david.laight.linux-AT-gmail.com, zhangzhanpeng.jasper-AT-bytedance.com, yang.yicong-AT-picoheart.com, iommu-AT-lists.linux.dev, linux-riscv-AT-lists.infradead.org, linux-kernel-AT-vger.kernel.org, linux-perf-users-AT-vger.kernel.org | |
| Subject: | [PATCH v6 0/2] RISC-V IOMMU HPM support | |
| Date: | Sun, 23 Aug 2026 19:20:27 -0700 | |
| Message-ID: | <[email protected]> | |
| Cc: | Zong Li |
|
| Archive-link: | Article |
This series implements support for the RISC-V IOMMU hardware performance monitor. The RISC-V IOMMU PMU driver is implemented as an auxiliary device driver created by the parent RISC-V IOMMU driver. Therefore, the child driver can obtain resources and information from the parent device, such as the MMIO base address and IRQ number. Changed in v5: - Pick up suggestions from sashiko-bot as follows - Fix event group validation for sw event - Bind IRQ to aux PMU dev instead of parent IOMMU dev - Clear OF bit when event is NULL - Improve hi-lo-hi patten - Add back IRQF_SHARED flag due to mismatch - Manage cpuhp and pmu register by devre Changed in v4: - Rebased onto v7.3-rc - Use is_sampling_event() instead of accessing vairable directly - Rename the matching name from "iommu.pmu" to "riscv-iommu.pmu" - Change the naming of PMU device for avoid ":" in PCIe case - Add suppress_bind_attrs attribute - Remove IRQF_SHARED flag - Set irq affinity to local CPU of IOMMU - Allocate ID by IDA for auxiliary device - Pick up suggestions from sashiko-bot Changed in v3: - Rebased onto v7.2-rc3 - Use hi_lo_writeq/readq to access register - Pick comments from sashiko-bot as follows - Set IRQ CPU affinity - Remove IRQF_ONESHOT flag when request irq - Adjust cycle event check by checking event_id field only - Fix bug for group events verificaiton - Fix KASAN issue about casting 32-bit variable to unsigned long pointer - Clear IPSR pending bit before starting counter - Clear OF bit in event selector register in irq handler - Release irq by devm instead of explicit free_irq Changed in v2: - Rebased onto v7.2-rc1 - Use hi-lo-hi mechanism to read counter. Suggested by Guo Ren and David Laight Changed in v1: - Rebased onto v6.19-rc8 - Pick all suggestions and feedbacks from v1 series - Add cpu hotplug implementation to avoid race enablement - Move PMU-related definition from header to c file - Change PMU driver to auxiliary device driver Changed in RFC: - Rebase onto v6.13-rc7 - Clear interrupt pending before handling interrupt - Fix the counter value issue caused by OF bit in the cycle counter. - Invoke riscv_iommu_hpm_disable() instead of riscv_iommu_pmu_uninit() in riscv_iommu_remove() Zong Li (2): drivers/perf: riscv-iommu: add risc-v iommu pmu driver iommu/riscv: create a auxiliary device for HPM drivers/iommu/riscv/Kconfig | 1 + drivers/iommu/riscv/iommu-bits.h | 61 --- drivers/iommu/riscv/iommu.c | 37 ++ drivers/perf/Kconfig | 12 + drivers/perf/Makefile | 1 + drivers/perf/riscv_iommu_pmu.c | 813 +++++++++++++++++++++++++++++++ 6 files changed, 864 insertions(+), 61 deletions(-) create mode 100644 drivers/perf/riscv_iommu_pmu.c -- 2.43.7
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