operating system – qemu risc-v interrupt not handled : time_lo write not implemented , time_hi write not implemented

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Recently, as I simulated a RISC-V 64 processor with a single CPU and 128MB of memory, I encountered a warning, resulting in the timer interrupt no longer managed.

The warning :

qemu-system-riscv64: clint: time_lo write not implemented
qemu-system-riscv64: clint: time_hi write not implemented

I’m emulating with this comand :

qemu-system-riscv64 -device VGA -machine virt -nographic -cpu rv64 -smp 1 -m 128M  -serial mon:stdio  -bios none -kernel kernel.elf

And compiling with :

riscv64-unknown-elf-gcc build/*.o boot.S  -ffreestanding -nostartfiles -nostdlib -nodefaultlibs -g -Wl,--gc-sections -mcmodel=medany -march=rv64g -Wl,--no-warn-rwx-segments -T kernel.ld -o kernel.elf

I tried to read about devicetree blob but I think that is not related to that.

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