Abnormal OUTA waveform on 2EDB7259YXUMA1 while INA…
Hi Abhilash,
Thank you for your support.
I did more tests on my 3-phase inverter board using the 2EDB7259YXUMA1 gate drivers.
When I run SinPWM at 24 V DC bus with no load, I observe that the U and V phase gate signals look clean when measured with respect to AGND. However, the W phase, which is located closest to the DC bus capacitor / power loop area, shows distortion or noise at the beginning of the pulse when measured with respect to AGND.
Then I measured the gate outputs using the correct isolated output-side reference. All six gate outputs measured as OUTx with respect to its own VEEx / GNDx are clean square waves. The distortion only appears when measuring some signals, especially W phase, with respect to AGND. The switch node of the W phase also looks noisy when measured with respect to AGND.
So my understanding is that the gate drive signals themselves are correct, and the abnormal waveform referenced to AGND is mainly common-mode noise or reference movement between the isolated output-side ground and the control-side AGND.
Could you please confirm if this interpretation is correct?
If all six gate signals measured as OUTx–VEEx are clean square waves, with correct amplitude, correct PWM pattern, and correct deadtime, is it safe to continue testing the 3-phase inverter with load at low DC bus voltage?
Before applying load, what additional checks would you recommend? For example:
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VDDx–VEEx stability for each isolated driver supply
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VEEx–AGND common-mode noise level
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switch node waveform with respect to PGND/DC-
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INA/INB input signals at the IC pins
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DIS and STP/DTC pin status
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deadtime between high-side and low-side devices
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possible impact on ADC/current sensing and protection signals
Best regards,
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