riscv – How to set RISC-V `-march` for zig build

When cross-compiling for RISC-V with Zig I believe you do something like this:

pub fn build(b: *std.Build) void {
    const target = b.resolveTargetQuery(.{
        .cpu_arch = .riscv32,
        .abi = .ilp32,
        .os_tag = .freestanding,
    });
    ...

But how do you enable other extensions? There’s a cpu_features_add field but it seems to be some kind of bitfield and I can’t figure out what to do with it.

For example how would you set this -march ISA string?

RV64IMAFDC_Svinval_Zicsr_Zifencei_Zba_Zbb_Zbs_Zicbom_Zicbop

Bonus question: how do you set the ABI to ilp32f or ilp32d? Or even lp64 – that seems to be missing from Abi, though it does exist in CallingConvention?