Memcopy Instruction in Risc V

I designed a RiscV 32bit single cycle processor without pipelining for a project. We are given to implement a new instruction called “Memcopy”. What it does is copies an array of size N from one location to another location. (N>1). But is it possible to implement this kind of instruction in a single cycle processor because to copy N value from memory to another location, it has to execute load and store instructions N times. So in a multicycle processor it is possible. But what about implementing it on a single cycle processor ?

Thanks in Advanced !!